Stored program / von Neumann architecture

The modern CPU follows the stored program model proposed by John von Neumann in 1945. The big idea: program instructions live in the same memory as data, and the CPU fetches instructions one at a time and executes them.

Components

• CPU — central processing unit, the part that runs instructions.
• Main memory (RAM) — fast, volatile storage for the running program and data.
• Buses — the wires that carry signals between CPU, memory and I/O.
  • Address bus — carries memory addresses (CPU → memory). One direction.
  • Data bus — carries data both directions (CPU ↔ memory).
  • Control bus — carries control signals (read, write, clock, interrupt).
• I/O devices — keyboard, screen, storage, network.

The fetch–decode–execute cycle

The CPU repeats this cycle billions of times per second:

1. Fetch. The CPU sends the address of the next instruction (held in the Program Counter, PC) to memory via the address bus. Memory replies with the instruction over the data bus, which is stored in the Memory Data Register (MDR).

2. Decode. The instruction is moved into the Current Instruction Register (CIR). The control unit decodes the instruction — what operation, what operands.

3. Execute. The CPU performs the operation, possibly involving the ALU (arithmetic), reading further data from memory, or writing back to memory. The PC is incremented to point at the next instruction.

The cycle then restarts at step 1.

A sample cycle (high-level)

Memory:
 100: LOAD R1, 200    (fetch a value from address 200 into R1)
 101: ADD  R1, 1
 102: STORE R1, 200
 ...
 200: 5

Cycle 1 (PC=100):
  Fetch:   address bus 100; data bus returns "LOAD R1, 200"; → MDR
  Decode:  instruction in CIR; identify LOAD operation
  Execute: address bus 200; data bus returns 5; → R1; PC ← 101

Cycle 2 (PC=101):
  Fetch:   "ADD R1, 1" → R1 = 6; PC ← 102
  ...

Why "stored program"?

Before von Neumann, computers had to be physically rewired to run a different program. By storing both data and instructions in the same memory, software became easy to load — exactly how every modern computer works.

A subtle consequence: a program can in principle modify its own instructions (rare today, but possible).

The buses

• Address bus — width determines maximum addressable memory. A 32-bit address bus can address 2³² addresses (4 GB if each address holds 1 byte).
• Data bus — width determines how many bits move per cycle. A 64-bit data bus moves 8 bytes per memory access.
• Control bus — handles signals like READ, WRITE, INTERRUPT, CLOCK, RESET.

Why von Neumann is dominant

• Flexibility — load any program by writing it to memory.
• Simplicity — one memory, one bus pattern.
• Universal — any algorithm can run on a von Neumann machine.

The von Neumann bottleneck

Because instructions and data share one memory and bus, the CPU spends time waiting for memory. Cache memory mitigates this by keeping recently-used data in fast SRAM near the CPU. Modern systems also use Harvard architecture (separate instruction and data memory) for the inner CPU pipeline.